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Agent skill

Interrupts And Exceptions Baremetal

by mohitmishra786 in mohitmishra786/low-level-dev-skills

Bare-metal interrupt and exception skill for Cortex-M NVIC. An agent skill from mohitmishra786/low-level-dev-skills.

MITAuto-check passedDevelopment

Install Interrupts And Exceptions Baremetal

skills CLI
$ npx skills add mohitmishra786/low-level-dev-skills --skill interrupts-and-exceptions-baremetal -a claude-code

Project install by default; add -g for ~/.claude/skills/.

GitHub CLI
$ gh skill install mohitmishra786/low-level-dev-skills interrupts-and-exceptions-baremetal --agent claude-code

Project scope by default; add --scope user for a personal install. Needs GitHub CLI 2.90.0 or later (public preview).

Manual copy
$ git clone --depth 1 https://github.com/mohitmishra786/low-level-dev-skills.git skills-src && mkdir -p .claude/skills && cp -r skills-src/skills/baremetal/interrupts-and-exceptions-baremetal .claude/skills/interrupts-and-exceptions-baremetal && rm -rf skills-src

Use ~/.claude/skills/ instead of .claude/skills for a personal install. The folder must contain SKILL.md.

Claude Code skills documentation · loads skills from .claude/skills/

Facts

Skill name
interrupts-and-exceptions-baremetal
GitHub stars
252
Token cost
~1k tokens
SKILL.md length
259 words
Files
1
Skills in repo
138
Repo updated
First seen
Licence
MIT

At a glance

Bare-metal interrupt and exception skill for Cortex-M NVIC. An agent skill from mohitmishra786/low-level-dev-skills.

  • Works in 7 steps: NVIC overview (Cortex-M) → Enable and prioritize an IRQ → ISR template → …
  • Configuring priorities
  • SKILL.md covers Purpose, When to Use, Workflow and Common Problems, plus 1 more section
  • Instructions only: no scripts, shell commands, URLs or credentials in SKILL.md

What it does

Interrupts And Exceptions Baremetal is an agent skill from mohitmishra786/low-level-dev-skills. Bare-metal interrupt and exception skill for Cortex-M NVIC. Use when writing ISRs, configuring priorities, handling HardFault, or measuring interrupt latency. Activates on queries about NVIC, ISR, vector table, HardFault, tail-chaining, or interrupt priority.

Its SKILL.md is about 1k tokens, which your agent loads only when the skill is triggered. It is a single SKILL.md file with no bundled scripts.

It sits in Development. The repository describes itself as: A curated suite of AI agent skills for systems and low-level programming with C/C++, Rust, and Zig toolchains, covering compilers, debuggers, profilers, build systems…. The licence is MIT.

When your agent uses it

  • Configuring priorities
  • Handling HardFault
  • Measuring interrupt latency

Example prompts

  • “/interrupts-and-exceptions-baremetal”

Workflow steps

7 steps, taken from the step headings in SKILL.md.

  1. NVIC overview (Cortex-M)
  2. Enable and prioritize an IRQ
  3. ISR template
  4. Critical sections
  5. HardFault handler
  6. Latency and tail-chaining
  7. Agent usage examples

What it can do on your machine

Read from SKILL.md and the folder at commit bdc5847. It shows what the files ask for, not the result of running them.

  • Tool permissions

    Pre-approves nothing: there is no allowed-tools line, so your agent's usual permission prompts apply.

    From allowed-tools in the SKILL.md frontmatter.

  • Runs code

    No scripts in the folder and no shell commands in SKILL.md (its code samples are c).

    From the folder's file list and the shell code blocks in SKILL.md.

  • Network

    No URLs in SKILL.md.

    From URLs in SKILL.md, links to its own repository left out.

  • Credentials

    Names no API keys, tokens, secrets or passwords.

    From names ending in _API_KEY, _TOKEN, _SECRET, _KEY or _PASSWORD in SKILL.md.

Context cost

Interrupts And Exceptions Baremetal loads about 1k tokens when it runs. Until then it costs about 74 tokens; SKILL.md has 259 words of instructions outside code blocks.

Always · name and description, kept in context so the agent knows when to use it
~74
When it runs · the whole SKILL.md, loaded when a task matches
~1k

Estimates: characters ÷ 4, the usual rule of thumb; real counts depend on the model's tokenizer. Scripts and assets cost tokens only if the agent reads them.

Safety

Auto-check passed

The automated check found no risky patterns in SKILL.md.

Automated static check — not a guarantee. Review scripts before installing. It scans the text of SKILL.md for risky patterns (piping downloads into a shell, reading credential files, hidden Unicode, destructive commands); files beside SKILL.md are not scanned.

SKILL.md

The full file from mohitmishra786/low-level-dev-skills at commit bdc5847, republished under its MIT licence (© mohitmishra786). 259 words, ~1,014 tokens.

Download SKILL.mdSave it as .claude/skills/interrupts-and-exceptions-baremetal/SKILL.md (or your agent's skills folder).
name
interrupts-and-exceptions-baremetal
description
Bare-metal interrupt and exception skill for Cortex-M NVIC. Use when writing ISRs, configuring priorities, handling HardFault, or measuring interrupt latency. Activates on queries about NVIC, ISR, vector table, HardFault, tail-chaining, or interrupt priority.

Interrupts and Exceptions (Bare-Metal)

Purpose

Guide agents through bare-metal interrupt handling on ARM Cortex-M: NVIC configuration, ISR writing rules, exception handlers (HardFault, BusFault), priority grouping, nesting, tail-chaining, and latency considerations.

When to Use

  • Configuring peripheral IRQ priorities
  • Writing ISRs that must not block
  • Debugging HardFault after enabling interrupts
  • Sharing data between ISR and main loop
  • Optimizing interrupt latency

Workflow

1. NVIC overview (Cortex-M)
Exception / IRQ flow
├── NVIC receives IRQ (priority compare with BASEPRI/PRIMask)
├── Stacking: automatic save r0-r3, r12, lr, pc, psr
├── Branch to handler from vector table
├── Handler runs (should be short)
└── Unstack and return — tail-chain if another IRQ pending
2. Enable and prioritize an IRQ
c
#include "stm32f4xx.h"  /* CMSIS device header */

void uart_irq_init(void) {
    NVIC_SetPriority(USART2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 2, 0));
    NVIC_EnableIRQ(USART2_IRQn);
}

Priority: lower numeric value = higher urgency (on most Cortex-M implementations). Check vendor docs for grouping bits.

3. ISR template
c
void USART2_IRQHandler(void) {
    if (USART2->SR & USART_SR_RXNE) {
        uint8_t b = (uint8_t)USART2->DR;  /* read clears RXNE */
        ringbuf_push(b);
    }
    if (USART2->SR & USART_SR_ORE) {
        (void)USART2->DR;  /* clear overrun */
    }
}

ISR rules:

  • No blocking calls (printf, malloc, long loops)
  • Minimize work — defer to main via flag/ring buffer
  • Clear interrupt flags per datasheet (read-to-clear vs write-1-clear)
4. Critical sections
c
uint32_t primask = __get_PRIMASK();
__disable_irq();
/* atomic section */
__set_PRIMASK(primask);

Or raise BASEPRI to mask lower-priority IRQs only.

5. HardFault handler
c
void HardFault_Handler(void) {
    __asm volatile(
        "tst lr, #4\n"
        "ite eq\n"
        "mrseq r0, msp\n"
        "mrsne r0, psp\n"
        "b hard_fault_c\n"
    );
}

void hard_fault_c(uint32_t *stack) {
    uint32_t r0  = stack[0];
    uint32_t pc  = stack[6];
    uint32_t psr = stack[7];
    /* log pc — GDB: info registers, bt */
    while (1);
}

Decode CFSR/HFSR registers for fault cause:

c
volatile uint32_t cfsr = SCB->CFSR;
volatile uint32_t hfsr = SCB->HFSR;
volatile uint32_t bfar = SCB->BFAR;
6. Latency and tail-chaining
FactorImpact
Higher priority IRQPreempts lower
Tail-chainingBack-to-back IRQs skip unstack/restack
FPU contextLazy stacking adds latency on M4F/M7
Long ISRsStarves other IRQs and main

Measure with GPIO toggle + scope, or DWT cycle counter (DWT->CYCCNT).

7. Agent usage examples
/interrupts-and-exceptions-baremetal Configure NVIC priority for UART vs SysTick
/interrupts-and-exceptions-baremetal Decode HardFault stacked PC with GDB

Common Problems

SymptomCauseFix
IRQ never firesNVIC not enabled or IRQ maskedNVIC_EnableIRQ; check PRIMASK
Spurious re-entryFlag not clearedClear per RM (ORE needs DR read)
HardFault in ISRStack overflowIncrease _estack; check ISR stack
Lost bytesISR too slowRing buffer + higher IRQ priority
Priority inversionLong critical sectionShorten __disable_irq window
  • skills/baremetal/baremetal-startup — vector table entries
  • skills/baremetal/uart-serial-baremetal — UART IRQ handlers
  • skills/embedded/openocd-jtag — GDB breakpoint in ISR
  • skills/debuggers/gdb — examine fault stack frame
  • skills/low-level-programming/assembly-arm — fault handler asm

© mohitmishra786, MIT. Rendered from Markdown: HTML in the file is shown as text, images as links, and headings moved down two levels. Raw file

Files

Just SKILL.md in skills/baremetal/interrupts-and-exceptions-baremetal of mohitmishra786/low-level-dev-skills.

Open the folder on GitHubat commit bdc5847

Compare with similar skills

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PR Babysitteropeninterpreter/openinterpreter69k3 repos~4.2kAutomated safety check: PassApache-2.0
Code Review ChecklistshareAI-lab/learn-claude-code78k4 repos~1.1kAutomated safety check: PassMIT

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Categories

Questions about Interrupts And Exceptions Baremetal

What does Interrupts And Exceptions Baremetal do?

Bare-metal interrupt and exception skill for Cortex-M NVIC. An agent skill from mohitmishra786/low-level-dev-skills. Interrupts And Exceptions Baremetal is an agent skill from mohitmishra786/low-level-dev-skills. Bare-metal interrupt and exception skill for Cortex-M NVIC.

When should I use Interrupts And Exceptions Baremetal?

Interrupts And Exceptions Baremetal fits situations like: configuring priorities; handling HardFault; measuring interrupt latency.

How do I install Interrupts And Exceptions Baremetal in Claude Code?

Run `npx skills add mohitmishra786/low-level-dev-skills --skill interrupts-and-exceptions-baremetal -a claude-code`. Or copy the skill folder (skills/baremetal/interrupts-and-exceptions-baremetal in mohitmishra786/low-level-dev-skills) into .claude/skills/interrupts-and-exceptions-baremetal in your project. Claude Code loads it when a task matches its description.

How do I install Interrupts And Exceptions Baremetal in Codex?

Run `npx skills add mohitmishra786/low-level-dev-skills --skill interrupts-and-exceptions-baremetal -a codex`. Or copy the skill folder (skills/baremetal/interrupts-and-exceptions-baremetal in mohitmishra786/low-level-dev-skills) into .agents/skills/interrupts-and-exceptions-baremetal in your project. Codex loads it when a task matches its description.

Can I use Interrupts And Exceptions Baremetal in Cursor, Gemini CLI or GitHub Copilot?

Cursor, Gemini CLI, GitHub Copilot and OpenCode also load SKILL.md folders. With the skills CLI, run `npx skills add mohitmishra786/low-level-dev-skills --skill interrupts-and-exceptions-baremetal -a cursor` (or -a gemini-cli, github-copilot or opencode for the others). To copy it by hand, put the folder in .cursor/skills/interrupts-and-exceptions-baremetal, .gemini/skills/interrupts-and-exceptions-baremetal, .github/skills/interrupts-and-exceptions-baremetal and .opencode/skills/interrupts-and-exceptions-baremetal in your project.

What does Interrupts And Exceptions Baremetal need to run?

SKILL.md names no scripts, command-line tools or credentials: Interrupts And Exceptions Baremetal is instructions for the agent only.

Does Interrupts And Exceptions Baremetal access the network?

SKILL.md contains no URLs. Any network use would come from the scripts or tools the agent runs. This is read from the text; nothing was executed.

Is Interrupts And Exceptions Baremetal safe to install?

Our automated static check of SKILL.md found no risky patterns, such as piping downloads into a shell, reading credential files or hidden Unicode. It is not a guarantee. Review the folder before installing.

What licence does Interrupts And Exceptions Baremetal use?

Interrupts And Exceptions Baremetal is published under the MIT licence (the repository's licence). It allows redistribution, so the full SKILL.md is shown on this page.

How many tokens does Interrupts And Exceptions Baremetal use?

About 1k tokens (SKILL.md is roughly 4.1k characters). Agents keep only the skill's name and description in context until a task matches; then they load SKILL.md in full.

What are the alternatives to Interrupts And Exceptions Baremetal?

Skills that share tags, products or a category with Interrupts And Exceptions Baremetal: Vercel Composition Patterns (supabase/supabase, 111k stars), Finishing a Development Branch (obra/superpowers, 297k stars), Typescript Advanced Types (rolling-scopes/rsschool-app, 10k stars) and PR Babysitter (openinterpreter/openinterpreter, 69k stars). The comparison table on this page puts their stars, adoption, token cost, safety result and licence side by side.

Who maintains Interrupts And Exceptions Baremetal?

mohitmishra786 (a GitHub user) maintains it in mohitmishra786/low-level-dev-skills, which has 252 GitHub stars. The repository holds 138 skills in this directory. The repository was last updated on June 27, 2026.

Source: mohitmishra786/low-level-dev-skills on GitHub. Facts on this page come from the repository at the commit we read; the author's words are quoted as theirs.