By exeex

Prepare a macOS or Ubuntu machine for edge-e3 development, diagnose missing Verilator/LLVM/Python dependencies, initialize the public repository, and answer or act on the example prompts in the root…

exeex/edge-cores

Prepare, validate, submit, triage, and review open-source contributions to the shared Edge RV framework in edge-cores.

exeex/edge-cores

Generate, compare, validate, and prepare mixed public/private RTL release packages with symbol-obfuscated proprietary RTL and unchanged public RTL dependencies.

exeex/edge-cores

Integrate and publish your own accelerator or ASIC design, DMA, and DTCM/SRAM with the Edge RV64 scalar core and command path.

exeex/edge-cores

Run and diagnose the repository-local Yosys synthesis profiles for edge-e3 encrypted product RTL, edge-rv, and edge-rv-lite, then summarize FPGA resource reports.

exeex/edge-cores

Develop and profile the edge-e3 PyTorch-to-NNC flow, including nnc/compiler.py lowering and generated ABI, example/llama smoke models, cpp/libnn runtime operators, BF16 correctness checks, and…

exeex/edge-cores

Run, extend, debug, or review the public edge-e3 bare-metal software harness, including encrypted Verilator builds, hello and tensor examples, all example/llama/model smoke cases, PyTorch BF16…

exeex/edge-cores

Build and run the public 64x64 x 128-token tiled circular tensor matmul example on the encrypted Edge Verilator simulator.

exeex/edge-cores

Build or debug the public Edge SoC Verilator demo that uses only src/edge-e3enc/edgee3enc.v as its core RTL input.

exeex/edge-cores