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Testing & QA · By hdl-tools
3 skills found.
Skills
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| # | Skill | Repository | Stars | Used in | Tokens | Auto-check | Licence | Updated |
|---|---|---|---|---|---|---|---|---|
| 1 | 1.Dft Design for Test — scan architecture planning, scan insertion, ATPG pattern generation, MBIST for embedded memories, and JTAG boundary scan. | hdl-tools/ | 214 | — | ~3.3k | Automated safety check: Notes | MIT | 7 days ago |
| 2 | Formal property verification (FPV) and logical equivalence checking (LEC). | hdl-tools/ | 214 | — | ~3.4k | Automated safety check: Notes | MIT | 7 days ago |
| 3 | UVM-based functional verification — testbench architecture, test planning, directed and constrained-random stimulus, functional and code coverage closure, formal assist, and regression sign-off. | hdl-tools/ | 214 | — | ~4.5k | Automated safety check: Notes | MIT | 7 days ago |
