Kicad Manufacture

KiCAD Manufacturing & Fabrication Workflow

Prepare manufacturing outputs through Konnect MCP tools. Treat each tool result as evidence with a named scope: a successful request is not by itself proof of a complete, current, upload-ready package. A required check or artifact that cannot be established makes the manufacturing verdict INCOMPLETE.

Toolset loading

Load the required toolsets:

load_toolset('pcb_export')       # Gerber, drill, BOM, position, 3D, and direct DRC evidence
load_toolset('manufacturing')    # Package export, manufacturing preflight, and rough cost estimate

Load additional toolsets only for the branch that needs them:

load_toolset('sch_analysis')     # schematic inventory and footprint assignment
load_toolset('integration')      # local JLCPCB catalogue and alternatives

Call get_active_toolsets() before loading more.

References by manufacturing branch

• Read references/gerber-layers.md when selecting plot layers or accepting a generated artifact inventory.
• Read references/jlcpcb-rules.md only when JLCPCB is the selected fabricator or assembler. It defines how to capture the current order contract without caching volatile limits, prices, categories, or field names in this skill.

1. Capture the order contract

Before checking or exporting, record the selected fabricator, service tier, stackup, copper weight, finish, assembly sides, stencil requirement, quantity, and any controlled-impedance service. Record the source and retrieval date for every vendor-controlled requirement. Project rules and output acceptance are judged against that record.

Completion criterion: every applicable fabrication and assembly constraint has one current authority, and no decision rests on an undated table in this skill.

2. Establish direct design evidence

Run direct KiCad DRC against the saved target board and resolve every error or record a deliberate, reviewable waiver. Then run:

validate_for_manufacturing(board, fab_house?)

The current handler checks only:

• presence of at least one Edge.Cuts item;
• presence of footprints;
• the configured minimum trace width against its built-in fab profile;
• the coarse case where several nets exist but no routed tracks exist; and
• direct kicad-cli DRC evidence, which must be available and complete for a READY verdict.

Read verdict, issues, and drc together. A null or incomplete drc, a NOT READY verdict, or an unadjudicated issue blocks release.

This preflight does not prove outline closure, copper on every pad, drill-size acceptance, silkscreen clearance, stackup compatibility, or assembly readiness. Establish those separately with direct DRC, the selected fabricator's current contract, Gerber/drill inspection, BOM/CPL review, and the order preview.

Completion criterion: direct DRC is complete, every reported issue is resolved or waived, and every check outside the handler's stated scope has named evidence.

3. Export into a fresh destination

Prefer a new, empty output directory for each invocation. This makes stale files structurally unable to impersonate output from the current invocation.

For a package attempt:

export_manufacturing_package(board, output_dir, fab_house?, schematic?, jlcpcb_cpl_corrections_path?)

Pass schematic when assembly output requires a BOM. The tool attempts Gerber, drill, position, and BOM exports according to the request; individual failures can still leave a partial directory.

For JLCPCB assembly, open the exact target board with IPC enabled before export. The package uses a stable live board snapshot and native pad-box midpoints; placement_orientation.geometry records the observed source. Saved project settings and schematic BOM remain separate inputs. Review legacy position offsets that compensated for anchors before retaining them. Read docs/JLCPCB_CPL_CORRECTIONS.md for coordinates, refusals, and migration details.

For fab_house="jlcpcb", use millimetres (the default) and provide the BOM fields, labels, and grouping required by the current order contract. The tool emits BOM-<project>.csv plus CPL-<project>.csv; the CPL uses JLCPCB's Designator,Mid X,Mid Y,Layer,Rotation schema, and KiCad is instructed to enumerate grouped BOM references instead of compressing them into ranges. DNP parts are excluded from both native exports; any remaining population mismatch caused by board/schematic exclusion flags makes the package incomplete. This conversion applies Konnect's independently verified built-in CPL correction policy. Pass a checked-in project policy through jlcpcb_cpl_corrections_path when an unmatched footprint or one exact designator needs a correction. The precedence and JSON format are documented in docs/JLCPCB_CPL_CORRECTIONS.md.

Inspect placement_orientation.applied_corrections and placement_orientation.unmatched_footprints. complete: true proves the package is structurally complete; it does not prove physical placement orientation. Require placement_orientation.status == "PREVIEW_REQUIRED" to be discharged by inspecting every component in JLCPCB Component Placements before an order is approved. Never describe the CPL as physically validated from the automated result alone.