By Xilinx

A skill your agent uses when an NPU kernel passes its standalone shape test but produces NaN, garbage, or stale values when invoked as part of a larger pipeline.

Xilinx/mlir-air

A skill your agent uses when NPU FlashAttention hangs (ERTCMDSTATETIMEOUT) or produces NaN at headdim ≥ 128.

Xilinx/mlir-air

A skill your agent uses when stitching kernels into a multi-launch ELF and the AIE compiler rejects the merged module (BD exhaustion, channel routing, herd shape conflict, IR validation error, DMA…

Xilinx/mlir-air

Entry point for deploying a new decoder-only LLM on AMD NPU2.

Xilinx/mlir-air

Optimization skill — reuse NPU BufferObjects across calls instead of re-allocating/re-writing them.

Xilinx/mlir-air

Optimization skill — choose activation layouts so consecutive kernels hand off on-device without a host-side transpose.

Xilinx/mlir-air

Procedural recipe for fusing multiple air.launch kernels into one multi-launch ELF (single XRT invocation).

Xilinx/mlir-air

Phase 0 of LLM deployment — produce <modelweights.py (HF weight loader) and <modelcpuhelpers.py (the few NumPy helpers production prefill/decode import), then confirm the HF bf16 reference baseline…

Xilinx/mlir-air

Phase 1 of LLM deployment — for every leaf kernel × shape the model needs, verify numerical correctness on real NPU2 against the registry's GPU/vLLM-aligned standard.

Xilinx/mlir-air

Phase 2 of LLM deployment — wire the verified Phase 1 kernels into one transformer block on NPU and verify per-layer cosine vs the HF bf16 reference (the shared programmingexamples/llms/verify/…

Xilinx/mlir-air

Phase 3 of LLM deployment — wire all N layers and verify NPU matches the HF bf16 reference end-to-end (per-layer cosine via the shared programmingexamples/llms/verify/ diagnosis lens + token-level…

Xilinx/mlir-air

Phase 4 of LLM deployment — apply the shared optimization skillset to a Phase-3-correct prefill pipeline (multi-launch merge, BO pre-loading + intermediate buffer reuse, seq-first layout).

Xilinx/mlir-air

Phase 5 of LLM deployment — apply the shared optimization skillset to a Phase-4-correct decode pipeline (multi-launch merge with N-way extern rename, static weight BOs, on-device layout).

Xilinx/mlir-air

Phase 6 of LLM deployment — integrate Phase 4 prefill + Phase 5 decode into a clean <modelinference.py, write the model's verifyadapter.py hooking into the shared programmingexamples/llms/verify/…

Xilinx/mlir-air

Phase 7 of LLM deployment — spawn a fresh subagent that treats the deployment as UNTRUSTED, audits the make verify implementation (anti-reward-hacking: confirms the token-set gate runs the…

Xilinx/mlir-air